1. Field of the Invention
The present invention relates to a circuit arrangement for controlling a semiconductor switching element, wherein a gate driver generates a sharp-edged control voltage for the semiconductor switching element, and the gate driver is connected to the control terminal of the semiconductor switching element.
2. Discussion of Background Information
Active semiconductor switching elements, and in particular transistors such as an insulated-gate bipolar transistor (IGBT) or a metal-oxide-semiconductor field-effect transistor (MOSFET) are often switched by using so-called gate drivers that are connected to the control terminal of the semiconductor switching element (a gate terminal, in the case of an IGBT or a MOSFET) and that generate a driver control voltage in order to control the current flow through the semiconductor switching element. A conventional standard gate driver generates a sharp-edged square wave voltage as driver control voltage. The semiconductor switching element is thereby controlled without regard to the respective switching behavior. This can lead to undesired oscillations, problems caused by high-frequency electromagnetic radiation, or even destruction of the semiconductor switching element. On the other hand, such standard gate drivers are commercially available as hardware modules at low cost.
The prior art already includes some solutions for eliminating or reducing the aforementioned problems of such standard gate drivers.
Patent document WO 2012/007558 A1 discloses a method and arrangement for controlling power MOS transistors. There, the transistor is controlled in order to switch off with a linearly descending control voltage and switch on with a linearly ascending control voltage—that is, each with a voltage ramp, in lieu of the sharp-edged driver control voltage. In terms of the circuitry, this is achieved by an impedance transformer having an amplifier, current sources, and a capacitor, i.e., by a complex electrical circuit.
It has likewise been proposed to actively regulate the voltage edges of the control voltage of the semiconductor switch through a closed control loop, such as in Lobsiger Y. et al., “Closed Loop di/dt & dv/dt Control and Dead Time Minimization of IGBTs in Bridge Leg Configuration,” Proceedings 14th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2013), Salt Lake City, USA, Jun. 23-26, 2013. Such active regulation for a gate driver, however, is costly on the hard hardware and software side.
The two concepts above are also alike in that both propose a completely new circuit for a gate driver, and this completely new circuit needs to be developed and implemented as hardware, possibly with suitable control software. Existing cost-effective standard gate driver modules, therefore, can no longer be used, but instead must be replaced by newly developed ones.